PSOC™ 61x5 Low power MCUs with embedded security, rich analog and digital peripherals

Overview

PSOC™ 61x5 is a product family within the PSOC™ 6 MCU portfolio and comes under the PSOC™ 61 Programmable Line. PSOC™ 6 MCU is based on an ultra-low power 40nm platform and supports various run time configurable power modes. The platform also supports various embedded security features like secured boot, secured key storage, and secured firmware updates.  PSOC™ 61 Programmable Line consists of single CPU core ARM® Cortex®-M4F based PSOC™ 6 MCUs.

PSOC™ 61x5 product family offers 512 KB of flash, 256 KB of SRAM, and a rich set of analog peripherals and digital peripherals. PSOC 61x5 product family can be used for a broad category of use cases - battery powered applications, low power sensor processing, motor control, integrated analog front end, touch user interface plus main MCU, system management control, general purpose embedded applications.

Block Diagram

  • High-performance, low-power compute system
    • 150-MHz Arm® Cortex®-M4F. Arm® Cortex®-M0+ reserved for system functions.
    • Ultra-low power 40 nm platform, ULP (0.9 V) and LP (1.1 V) core voltage operation
    • Six power modes for fine-grained power management
    • Three DMA Controllers
    • On chip memory – 512-KB flash, 256-KB SRAM
    • Memory expansion with external Quad SPI Flash (code / data)
  • Robust Security Features
    • Advanced cryptographic accelerator and true random number generator
    • One-time programmable eFUSE for secure key storage
    • Secured boot, ROM based root of trust, and image authentication
    • Secure over-the-air (OTA) firmware update with read-while-write flash technology for firmware updates
  • System Features
    • 1.7-V to 3.6-V operation, On-chip DC-DC Buck converter
    • Up to 64 Programmable GPIOs
    • On chip clocking, PLL, FLL, External 32 KHz / MHz crystal oscillator support
  • Rich on-chip peripherals
    • CAPSENSE™ capacitive touch – buttons, sliders, proximity sensing
    • Smart I/O for Boolean operations, discrete digital logic integration
    • 1x 12-bit 2-MSPS SAR ADCs, Hardware sequencer / multiplexer
    • 2x Low power Comparators
    • 4x 32-bit, 8x 16-bit Timer/Counter/PWM
    • 6x Serial Communication Blocks (I2C / SPI / UART)
    • 1x Deep sleep Serial Communication Block (I2C / SPI)
    • 1x USB Full-speed (Host / Device)
    • Segment LCD drive, serial interface display drivers
    • 1x CAN-FD
  • Packages
    • 49-WLCSP (37 IOs), 68-QFN (53 IOs), 100-TQFP (64 IOs)
  • Software / Hardware Development Support

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