EZ-PD™ PAG2 Power Adapter Generation 2
EZ-PD™ PAG2 Power Adapter Generation 2 subcategories
ZVS flyback converter chipset with integrated USB PD, synchronous rectification (SR), and PWM
EZ-PD™ PAG2 is a 2-chip secondary-side controlled flyback converter chipset (EZ-PD™ PAG2P and EZ-PD™ PAG2S) with integrated USB PD, synchronous rectifier (SR), and PWM controllers. EZ-PD™ PAG2 supports quasi-resonance flyback with zero voltage switching (QR-ZVS) and active clamp flyback (ACF). Its design supports PD 3.1 SPR and 28 V EPR. EZ-PD™ PAG2S standalone can pair with PWM controllers through an optocoupler by acting as USB PD and SR.
EZ-PD™ PAG2-AC is a two-chip secondary-side controlled ACF flyback converter using EZ-PD™ PAG2S-AC and EZ-PD™ PAG2P. EZ-PD™ PAG2S-AC integrates the internal error amplifier (EA) and a programmable ramp generator to regulate and control high- and low-side primary switches by sending PWM signals to the primary-side counterpart EZ-PD™ PAG2P via a pulse edge transformer (PET). The device also integrates the programmable low-side synchronous rectification and PD 3.1 SPR and 28 V EPR-compliant USB PD controller at the secondary side. EZ-PD™ PAG2P is a primary HV startup controller which integrates high-voltage start-up, pulse edge transformer (PET) receiver, low-side NFET gate driver, high-side logical level driver, fault protection, X-cap discharge, and boosts VCC. The EZ-PD™ PAG2-AC secondary-side controlled solution offers better regulation accuracy and lower standby power consumption than the primary-side controlled PWM controller. Its programmable parameters such as digital valley table, ACF pulse width, burst and skip frequency, and SR turn-on and turn-off delays enable better system performance than fixed function controllers.
EZ-PD™ PAG2-QZ is a two-chip secondary-side controlled QR-ZVS flyback converter using EZ-PD™ PAG2S-QZ and EZ-PD™ PAG2P. EZ-PD™ PAG2S-QZ integrates the internal error amplifier (EA) and a programmable ramp generator to regulate and control the low-side primary switch by sending PWM signals to the primary-side counterpart EZ-PD™ PAG2P via a pulse edge transformer (PET). The device also integrates the programmable low-side synchronous rectification and PD 3.1 SPR and 28 V EPR-compliant USB PD controller at the secondary side. EZ-PD™ PAG2P is a primary HV startup controller which integrates high-voltage start-up, pulse edge transformer (PET) receiver, low-side NFET gate driver, high-side logical level driver, fault protection, X-cap discharge, and boosts VCC. The EZ-PD™ PAG2-QZ secondary-side controlled solution offers better regulation accuracy and lower standby power consumption than the primary-side controlled PWM controller. Its programmable parameters such as digital valley table, ZVS pulse width, burst and skip frequency, and SR turn-on and turn-off delays enable better system performance than fixed function controllers.
EZ-PD™ PAG2S-PS is a highly integrated USB PD and SR controller for single-port power adapters. For USB PD, EZ-PD™ PAG2S-PS offers a highly programmable flash-based solution to meet PD 3.1 specification with SPR, PPS, and EPR support. For SR, EZ-PD™ PAG2S-PS supports short turn-on and turn-off delays for DCM and CCM converters, voltage-second integration to avoid false turn-ons, logical and non-logical SR MOSFETs, and switching frequencies up to 300 kHz. For fault protection, it supports OCP, SCP, OVP, UVP, OTP, VBUS-CC short, and VCONN current limits. EZ-PD™ PAG2S-PS is based on ARM® Cortex®-M0 with 64 KB of flash and offers a highly programmable USB-C PD and SR-integrated controller to meet different customer design requirements and specifications, while being capable of upgrading firmware over CC lines.