12V Automotive Lite System Basis Chip (SBC) TLE9471ES DC-DC Buck Stability Analysis: Parasitic PCB Board Layout

Open online SPICE simulator circuit link: atv_bp_12V_LiteSBC_TLE9471ES_AC_bode_stability_parasitics.TSC

12V Automotive Lite System Basis Chip (SBC) TLE9471ES DC-DC Buck Stability Analysis

Test Circuit: Parasitic PCB Board Layout

3D Bottom View of DC-DC SBC TLE9471 Board

3D Top View of DC-DC SBC TLE9471 Board

Parameter stepping
50nH, 100nH, 150nH, 200nH

The TLE9471ES is a monolithically integrated circuit in an exposed pad PG-TSDSO-24-1 (150 mil)
power package. The device is designed for various CAN automotive applications as main supply for

the microcontroller and as interface for a CAN bus network. To support these applications,
the System Basis Chip (SBC) provides the main functions, such as a 5 V lowdropout voltage
regulator (Buck SMPS) for e.g. a microcontroller supply, another 5 V low-dropout voltage regulator
with off-board protection for e.g. sensor supply, a HS-CAN transceiver supporting CAN FD for data
transmission, a high-voltage GPIO with embedded protective functions and a 16-bit Serial Peripheral
Interface (SPI) to control and monitor the device. Also implemented are a configurable timeout / window
watchdog circuit with a reset feature, one Fail Output and an undervoltage reset feature. The device
offers low-power modes in order to minimize current consumption on applications that are connected
permanently to the battery. A wake-up from the low-power mode is possible via a message on the buses,
via the bi-level sensitive monitoring/wake-up input as well as via cyclic wake.

The output load is represented as resistive "Load_Resistance" and series inductance "Load_Inductance"
(this inductance represents the sum of hot and return path between Output Load and Load Capacitor).
Load Capacitor "Cload" represent the capacitor mounted close to the Output Load. It has capacitance
"Cload" and series resistance "Cload_ESR". DC-DC main capacitor (Output Capacitor) is represented by
capacitance "Cout" and series resistance "Cout_ESR". The trace (sum of hot and return path) between

Output Capacitor and Load Capacitor is represented as series inductance "Trace inductance" and series
resistance "Trace Resistance". Buck Inductor is represented as series resistance measured at DC
"Inductance_DCR" and inductance "Inductance". Wide Band noise is injected by V_FBK
(sweeped sinusoidal signal with 0.1Vpp).

To check the circuit AC behavior and to create the Spice model was designed a dedicated board
(presented bellow) for this AC Bode Plot characterization:

PCB Trace between Load and DC-DC Buck